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AD7710AN - AD7710 Signal Conditioning ADC - Buy AD7710AN

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AD7710AN - AD7710 Signal Conditioning ADC

Features

arrowCharge Balancing ADC

  • - 24 Bits No Missing Codes
  • - ±0.0015% Nonlinearity

arrowTwo-Channel Programmable Gain Front End

  • - Gains from 1 to 128
  • - Differential Inputs

arrowLow-Pass Filter with Programmable Filter Cutoffs

arrowAbility to Read/Write Calibration Coefficients

arrowBidirectional Microcontroller Serial Interface

arrowInternal/External Reference Option

arrowSingle or Dual Supply Operation

arrowLow Power (25mW typ) with Power-Down Mode (7mW typ)


Pin Layout
Analog Devices AD7710 Pin Layout

Pin Description
Pin Number Description
1 SCLK - Serial Clock
2 MCLK IN - Master Clock In
3 MCLK OUT - Master Clock Out
4 A0 - Address Input
5 SYNC - Synchronization (Active Low)
6 MODE - Logic Input
7 +AIN1 - Analog Input Channel 1
8 -AIN1 - Analog Input Channel 1
9 +AIN2 - Analog Input Channel 2
10 -AIN2 - Analog Input Channel 2
11 Vss - Analog Negative Supply
12 AVdd - Analog Positive Supply
13 Vbias - Input Bias Voltage
14 REF IN- - Reference Input
15 REF IN+ - Reference Input
16 REF OUT - Reference Output
17 Iout - Compensation Current Output
18 AGND - Analog Ground
19 TFS - Transmit Frame Synchronization (Active Low)
20 RFS - Receive Frame Synchronization (Active Low)
21 DRDY - Logic Output (Active Low)
22 SDATA - Serial Data
23 DVdd - Digital Positive Supply
24 DGND - Digital Ground
Dimensional Drawing
AD7710AN - PDIP24 Dimension Drawing
AD7710AN - PDIP24 Dimension Drawing

Technical Data

Data Sheet

Analog Devices - Data Sheet for AD7710AN AD7710AN Datasheet

Application Notes