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NXP Adds New Low Power ARM Microcontrollers With The LPC1100XL
Two new microcontroller series feature dramatic reductions in power consumption and integrated EEPROM
NXP has released it's new LPC1100XL microcontrollers series featuring extra-low power.
With the industryís lowest active power consumption at 110 uA/MHz and reduced deep sleep current below 2µA, the LPC1100XL has set a new benchmark for low-power ARM® Cortex™-M0 microcontrollers.
Also released is the LPC11E00 series for space-constrained applications requiring dedicated EEPROM.
The LPC11E00 extends the range of options available in the NXP Cortex-M0 portfolio, including integrated USB, CAN, Segment LCD Ė and now EEPROM.
"We continue to outperform the industry in delivering the lowest power Cortex-M0 MCUs on the market, allowing designers to do even more with less power," said Jan Jaap Bezemer, director of marketing, microcontroller business line, NXP Semiconductors.
"At the same time, we continue to integrate new features such as memory extensions to 64KB Flash and EEPROM without sacrificing our low power commitment to customers."
LPC1100XL: Extra Low-Power Cortex-M0 Microcontrollers
The dramatic reductions in power consumption in the LPC1100XL are complemented by on-chip "power profiles" - a unique industry implementation of real-time power management.
Optimized for CPU performance, efficiency and lowest active current, the power profiles enable maximum operating frequency through the entire voltage range from 1.8V to 3.6V without compromising speed or functionality,
making the LPC1100XL an ideal choice for all low-power 8/16-bit applications.
The LPC1100XL incorporates NXPís proprietary embedded flash which extends solutions to 64 KB while incorporating 256 bytes of page erase.
The 256-byte page-erase feature significantly improves the efficiency and ease of use of the on-chip flash,
allowing for seamless field updates without having to erase a large sector to write the next page.
LPC11E00: Integrated EEPROM for a Smaller Footprint
The new LPC11E00 series features 4 KB of integrated EEPROM for space-constrained applications such as medical and industrial measuring devices.
This removes the need for external serial EEPROM, saving up to 15mm2 of PCB real estate and reducing electrical interconnect, while providing the added security of the microcontroller.
The LPC11E00 with 10K SRAM and 32 KB flash is a feature-rich solution and maximizes connectivity with 2 SSP, USART with smart card interface and I2C Fm+ and 54 GPIO pins.
The on-chip ROM in the LPC11E00 series includes a 32-bit divide library with an API interface offering several times the arithmetic performance of software-based libraries,
as well as a highly deterministic cycle time combined with reduced Flash code size.
Access to the 4 KB EEPROM on the LPC11E00 is simplified with an API interface which is also integrated in on-chip ROM.
The LPC1100XL and LPC11E00 series is supported by a wide range of third-party development tools, as well as NXPís LPCXpresso development platform.
LPCXpresso features a powerful Eclipse-based IDE with an intuitive NXP-designed user interface, optimized Cortex-M0 compiler and libraries.
Designed for simplicity and ease of use, LPCXpresso gives designers a quick and easy way to work with the microcontrollers, enabling anyone to develop with Cortex-M0.
Features of the LPC1100XL and LPC11E00 include:
- Speeds of up to 50 MHz
- LPC1100XL - Up to 64K Flash, 8K SRAM
- LPC11E00 - Up to 32K Flash, 10K SRAM
- 32 vectored interrupts; 4 priority levels; dedicated interrupts on up to 13 GPIOs
- UART (LPC1100XL), USART (LPC11E00),1-2 SSP, I2C (Fm+) as serial peripherals
- Two 16-bit and two 32-bit timers with PWM/Match/Capture
- 12 MHz internal RC oscillator with 1 percent accuracy over temperature and voltage
- Power-On-Reset (POR); multi-level Brown-Out-Detect (BOD); Phase-Locked Loop (PLL)
- 8-channel high-precision 10-bit ADC with ±1 LSB DNL
- Up to 54 GPIO pins (LPC11E00) and up to 42 GPIO pins (LPC1100XL)
The company's Web site address is http://www.nxp.com/.
[Reprinted with kind permission from NXP]
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